Semiconductor Wafer Map Defect Classification with Tiny Vision Transformers
This work addresses the problem of accurate and efficient defect classification for semiconductor manufacturing, offering an incremental improvement over existing methods.
The paper tackled semiconductor wafer defect classification by proposing ViT-Tiny, a lightweight Vision Transformer framework, which achieved an F1-score of 98.4% and outperformed state-of-the-art models by up to 3.13% in precision and recall across different defect classification tasks.
Semiconductor wafer defect classification is critical for ensuring high precision and yield in manufacturing. Traditional CNN-based models often struggle with class imbalances and recognition of the multiple overlapping defect types in wafer maps. To address these challenges, we propose ViT-Tiny, a lightweight Vision Transformer (ViT) framework optimized for wafer defect classification. Trained on the WM-38k dataset. ViT-Tiny outperforms its ViT-Base counterpart and state-of-the-art (SOTA) models, such as MSF-Trans and CNN-based architectures. Through extensive ablation studies, we determine that a patch size of 16 provides optimal performance. ViT-Tiny achieves an F1-score of 98.4%, surpassing MSF-Trans by 2.94% in four-defect classification, improving recall by 2.86% in two-defect classification, and increasing precision by 3.13% in three-defect classification. Additionally, it demonstrates enhanced robustness under limited labeled data conditions, making it a computationally efficient and reliable solution for real-world semiconductor defect detection.