Memristor-Based Spiking Neural Network Accelerator for Bio-inspired Interception Task
This work addresses the energy efficiency challenge for real-time edge intelligence by developing a memristor-based SNN accelerator, which is an incremental improvement for neuromorphic computing hardware.
This paper proposes an analog memristor-based spiking neural network (SNN) accelerator to overcome memory and computation bottlenecks in SNN implementations. The accelerator achieves a mean squared error (MSE) of 0.004 compared to ideal software inference and demonstrates 12.7 times lower energy consumption and 1.26 times lower delay than a digital SNN baseline.
Spiking neural networks (SNNs) provide event-driven and low-power computation inspired by biological neural systems, but current implementations rely on von Neumann graphics processing units (GPUs) and central processing units (CPUs) platforms, where memory and computation bottlenecks limit energy efficiency. To address this challenge, this paper proposes an analog memristor-based spiking neural network (SNN) accelerator that integrates in-memory synaptic computation with analog integrate-and-fire (IF) neurons, eliminating multi-transistor CMOS synapse circuits and enabling asynchronous event-driven operation at the 45nm technology node. Additionally, a digital SNN accelerator is designed and optimized at the 5 nm technology node for comparison. The proposed architecture is evaluated using a predator-prey tracking task that emulates pursuit behavior. In this task, the analog SNN accelerator's inference closely matches the ideal software inference with a mean squared error (MSE) of 0.004. HSPICE simulation results show that the proposed analog SNN accelerator achieves 12.7 times lower energy consumption and 1.26 times lower delay compared to the digital baseline, demonstrating the potential of memristor-based neuromorphic circuits for energy-efficient real-time edge intelligence.