CEDCJun 24

Optimizing Semiconductor Device Simulations through Low-Precision Arithmetic

arXiv:2606.255957.2Has Code
Predicted impact top 62% in CE · last 90 daysOriginality Incremental advance
AI Analysis

For HPC practitioners in semiconductor device simulation, this paper demonstrates a practical path to leverage GPU low-precision units without sacrificing result quality.

This work analyzes the numerical stability of the quatrex quantum transport solver when using low-precision arithmetic, achieving up to 51% higher throughput on 40% fewer HPC resources while maintaining accuracy.

Architectural changes in GPUs, especially the promotion of low-precision computational units, pose significant challenges to traditional, FP64-based high-performance computing (HPC) applications, while also presenting opportunities. Adopting reduced-precision data formats is a promising avenue to exploit the increased throughput capabilities. However, straightforward data conversions may lead to degraded accuracy or even erroneous results. For a given application, only an in-depth analysis of its numerical stability can reveal the potential of low-precision arithmetic. In this work, we consider the open-source quatrex package, a quantum transport solver capable of breaking the sustained FP64 Eflop/s barrier, to illustrate trade-offs between accuracy losses and computational speed-ups when moving from high- to low-precision formats. We use three representative benchmark structures to explore the application's numerical properties. Applying the gained insights to a larger, more realistic system, we achieve up to 51% higher throughput while maintaining accurate results, on 40% fewer HPC resources than the FP64 reference.

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