ARAILGDec 21, 2023

Cross-Layer Optimization for Fault-Tolerant Deep Learning

arXiv:2312.13754v12 citationsh-index: 27
Originality Incremental advance
AI Analysis

This addresses the challenge of deploying deep learning in safety-critical domains like avionics and robotics by making fault tolerance more hardware-efficient, though it appears incremental as it builds on existing selective protection and quantization techniques.

The paper tackles the problem of excessive hardware overhead in fault-tolerant deep learning accelerators for safety-critical applications by proposing a cross-layer optimization approach that selectively protects vulnerable components and reduces bit protection overhead through quantization constraints, achieving up to 40% reduction in hardware resource consumption while maintaining reliability, accuracy, and performance.

Fault-tolerant deep learning accelerator is the basis for highly reliable deep learning processing and critical to deploy deep learning in safety-critical applications such as avionics and robotics. Since deep learning is known to be computing- and memory-intensive, traditional fault-tolerant approaches based on redundant computing will incur substantial overhead including power consumption and chip area. To this end, we propose to characterize deep learning vulnerability difference across both neurons and bits of each neuron, and leverage the vulnerability difference to enable selective protection of the deep learning processing components from the perspective of architecture layer and circuit layer respectively. At the same time, we observe the correlation between model quantization and bit protection overhead of the underlying processing elements of deep learning accelerators, and propose to reduce the bit protection overhead by adding additional quantization constrain without compromising the model accuracy. Finally, we employ Bayesian optimization strategy to co-optimize the correlated cross-layer design parameters at algorithm layer, architecture layer, and circuit layer to minimize the hardware resource consumption while fulfilling multiple user constraints including reliability, accuracy, and performance of the deep learning processing at the same time.

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